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Welcome to CERTESS

Functional Qualification

If there was a bug in your design,
would you be able to find it ?

Certess helps integrated circuit (IC) design teams tackle the most formidable problem in functional verification: the absence of objective quality assurance in the verification of ICs and systems.

Most advanced functional verification teams currently use a combination of techniques to gain visibility into the question of verification quality only to constantly fall short of the ability to truly qualify designs. Although verification engineers have dedicated tools and methodologies for verification quality improvement, functional logic errors still remain the largest causes of chip respins.

We provide engineers with the ability to tell if design errors could go undetected and enable the objective evaluation of the quality of the functional verification, and therefore of the design functionality.

Functional qualification will enable design teams to improve their effectiveness and the predictability of their project schedules, which are currently dominated by the verification task.

Certitude map

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-News

- Interview with Certess CTO
- InformationWeek interview
- Certitude Must See at DAC 2008
- EDN Hot 100 Products of 2007
- The Great EDA Cover up

-Events

- Next event is CDNLive!

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SEE WHAT CERTITUDE CAN DELIVER
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